1. Technical Field of the Invention
This invention pertains to digital parallel processing systems wherein a plurality of nodes communicated via messages sent over an interconnection network. More particularly, the invention relates to a network adapter design for facilitating introduction of faster speed transmission products into a network including slower products.
2. Background Art
In a parallel system, wherein a plurality of nodes are interconnected by a multi-stage network, each node usually interfaces to the network via a network adapter. The network adapter normally implements message buffers, usually a send First In First Out (FIFO) containing a plurality of messages to be sent to the network, and a receive (RCV) FIFO buffer containing a plurality of messages which have been received from the network.
As network systems mature, a series of network adapters are produced with ever increasing performance. A problem with the introduction of adapters with increased performance is lack of compatibility with the older, slower speed adapters. There is a need in the art for an adapter design which enables the mixture of new, higher speed adapters, and old, slower speed adapters, in the same network system. Customers would prefer to mix adapters without having to loose the investment already made in the older adapters.
Similar problems have existed for years for adapter cards that plug into processor input/output (I/O) busses. The state-of-the-art solution is to introduce new signals in the I/O bus for controlling the speed of a transmission. The sending adapter looks for status on these new bus signals to determine how fast the receiving adapter can receive a transmission. After the receiving device senses its address on the bus, it drives the new bus signals to a state that defines to the sender the speed of the receiving adapter. This works very well for short busses, because the two parties of the transfer can decide quickly on an acceptable transmission speed to be used. The bus itself adapts readily to different frequencies since it is merely a group of parallel copper wires that can accept transmissions over a wide range of frequencies.
The same problem over multi-stage networks becomes more difficult to solve. Handshaking between adapters to establish a transmission speed over new speed control lines added to the network is not a viable solution for many reasons: (1) Distances between nodes can be great and the resulting latency of handshaking is usually an unacceptable practice that is not supported in most networks. (2) Most networks are unidirectional, going from sender to receiver, and contain two separate sets of communication lines, one going in each direction, that are totally independent of each other. This normal network concept does not support new speed control lines travelling in the reverse direction from receiver to sender. (3) Many networks comprise switches that are clocked at a given speed and have the capability to transmit at multi-speeds.
Consequently there is a need in the art for a transmission system design capable of dynamically adjusting the transmission speed of the sending network adapter and of the receiving network adapter to different transmission speeds with low latency, so that adapters with different maximum speed capabilities can communicate with each other over the same network. Thus, by way of example, there is a need to mix adapters having transmission speeds of, say, 8 Megahertz (MHZ), 25 MHZ and 50 MHZ so (1) a 8 MHZ adapter could communicate with 8 MHZ adapters, 25 MHZ adapters and 50 MHZ adapters, but the communication to and from all three adapter types is limited to 8 MHZ; (2) a 25 MHZ adapter could communicate with 8 MHZ adapters, 25 MHZ adapters and 50 MHZ adapters, with communication to/from the 8 MHZ adapter being limited to 8 MHZ, while communication to/from the other two adapter types is limited to 25 MHZ; and (3) a 50 MHZ adapter could communicated at all three speeds.
It is, therefore, an object of the invention to provide an improved network system having the capability of mixing high speed adapters and low speed adapters.
It is another object of the invention to provide an improved network adapter design capable of adapting its transmission speed to that of another adapter of the same or slower speed so as to mix adapters of different speeds in the same communication network.
This invention provides an apparatus and method for selectively sending and receiving data messages with respect to a communication network, and includes a sending adapter for sending send messages to the communication network, the send message including indicia defining the transmission speed; and a receiving adapter for receiving receive messages from the communication network, the receive message including indicia defining the transmission speed.
Other features and advantages of this invention will become apparent from the following detailed description of the presently preferred embodiments of the invention, taken in conjunction with the accompanying drawings. dr
FIG. 1 is a block diagram of a digital network in accordance with preferred embodiments of the invention, showing the interconnection of a network node to the network and the components of the network node.
FIG. 2 is a block diagram of a sending adapter for transmitting any of four different speed messages in accordance with a first embodiment of the invention.
FIG. 3 is a block diagram of a sending adapter for transmitting any of four different speed messages in accordance with a second embodiment of the invention.
FIG. 4 is a bit-by-bit definition of the 32-bit message header word that prefixes every message transmitted over the multi-speed network of FIG. 1.
FIG. 5 is a bit-by-bit definition of the 32-bit table look-up word that controls the message speed selection.
FIG. 6 is a block diagram showing further details of the speed control apparatus at the sending adapter according to the preferred embodiments of the invention.
FIG. 7 is a timing diagram for a byte-wide message transfer transmitted over the multi-speed network according to the preferred embodiments of the invention.
FIG. 8 is a block diagram of the receiving adapter for recovering asynchronously any of four different speed messages according to the preferred embodiments of the invention.
FIG. 9 is a timing diagram for byte-wide message transfer.